Electronics: Diodes, BJTs and FETs, Feedback and Oscillators, Op-amps and Active Filters, Waveform Generators, Digital Logic and Data Conversion
1. p–n diodes, BJTs and FETs
A p–n diode obeys I = I_s(eV/ηV_T − 1), with V_T = k_BT/e ≈ 25.9 mV at 300 K: exponential forward conduction beyond about 0.6–0.7 V for silicon, a tiny reverse saturation current, and breakdown at a reverse voltage that a Zener diode is designed to use as a voltage reference. Its small-signal resistance is r_d = ηV_T/I.
- BJT: with the base–emitter junction forward-biased and the base–collector reverse-biased (active region), I_C = βI_B, I_E = I_C + I_B, α = I_C/I_E = β/(1 + β). Saturation (both forward) and cut-off (both reverse) are the switch states.
- Common-emitter amplifier: transconductance g_m = I_C/V_T, input resistance r_π = β/g_m, voltage gain A_v ≈ −g_mR_C. At I_C = 1 mA, g_m = 40 mS and with R_C = 5 kΩ, A_v = −200 — inverting, and set by the bias current rather than by β.
- FETs are voltage-controlled with very high input resistance. A JFET in saturation follows I_D = I_DSS(1 − V_GS/V_P)² (I_DSS = 10 mA, V_P = −4 V, V_GS = −2 V gives 2.5 mA); an enhancement MOSFET follows I_D = K(V_GS − V_th)² above threshold. Their g_m is smaller than a BJT’s at the same current.
2. Negative and positive feedback, and oscillators
With open-loop gain A and a fraction β fed back, negative feedback gives A_f = A/(1 + Aβ). When Aβ ≫ 1, A_f → 1/β — fixed by passive components, not by the transistor. With A = 10⁵ and β = 0.01, A_f = 10⁵/1001 = 99.9. The price is gain; the returns are desensitivity (dA_f/A_f = (1/(1 + Aβ))dA/A), a bandwidth widened by (1 + Aβ), and distortion and noise inside the loop reduced by the same factor. Input and output impedances rise or fall by (1 + Aβ) depending on whether the feedback is sampled and mixed in series or shunt.
Positive feedback makes an oscillator. The Barkhausen criterion for sustained sinusoidal oscillation is Aβ = 1: loop gain of magnitude one and total phase shift of 0° (or 360°). In practice the gain is set slightly above one to start and limited by non-linearity. The standard circuits are the RC phase-shift oscillator (three RC sections give 180°, f = 1/(2π√6 RC), amplifier gain at least 29 — 650 Hz for R = 10 kΩ, C = 10 nF), the Wien-bridge oscillator (zero phase at f = 1/(2πRC), gain 3 — 995 Hz for R = 10 kΩ, C = 16 nF), the LC Colpitts and Hartley oscillators, and the crystal oscillator, whose high Q gives stability.
3. Operational amplifiers, their applications and active filters
An ideal op-amp has infinite gain, input impedance and bandwidth and zero output impedance. With negative feedback its output does whatever makes the two inputs equal (the virtual short), while no current enters either input. Everything follows from those two rules.
| Circuit | Output | Example |
|---|---|---|
| Inverting | V_o = −(R_f/R₁)V_i | R_f = 100 kΩ, R₁ = 10 kΩ, V_i = 0.2 V → −2 V |
| Non-inverting | V_o = (1 + R_f/R₁)V_i | 47 kΩ and 4.7 kΩ give 11; 0.3 V → 3.3 V |
| Summing | V_o = −R_f Σ(Vₖ/Rₖ) | a weighted adder; the D/A converter’s core |
| Integrator | V_o = −(1/RC)∫V_i dt | a square wave in gives a triangle out |
| Differentiator | V_o = −RC dV_i/dt | noisy; a series resistor limits high-frequency gain |
- Active filters: an RC network with an op-amp gives gain and buffering without inductors. A first-order low-pass has f_c = 1/(2πRC) and falls at 20 dB/decade; a second-order Sallen–Key section falls at 40 dB/decade, its Q set by the component ratios. High-pass, band-pass and notch forms follow by exchanging R and C.
- Real limits: finite gain–bandwidth product; slew rate SR limits a sine of peak V_p to f_max = SR/(2πV_p) (0.5 V/μs at 10 V peak gives 7.96 kHz); offset voltage and bias currents; CMRR measures rejection of the common-mode input.
4. Waveform generators: sine, square and triangle; the 555 timer
A Schmitt trigger is an op-amp comparator with positive feedback: a fraction β = R₂/(R₁ + R₂) of the output ±V_sat sets two thresholds ±βV_sat, so the hysteresis width is 2βV_sat — 8 V for β = 1/3 and ±12 V saturation. It cleans a noisy edge. Add an RC network from output to the inverting input and it becomes an astable multivibrator: the capacitor charges towards the output until it reaches the threshold, the output flips, and the cycle repeats with period T = 2RC ln[(1 + β)/(1 − β)], a square wave. Integrating the square wave gives a triangle wave; feeding the triangle back to the Schmitt trigger makes a function generator, and shaping the triangle or using a Wien oscillator gives the sine.
The 555 timer holds two comparators at 1/3 and 2/3 of V_CC, a flip-flop and a discharge transistor. As a monostable it gives one pulse of width 1.1RC per trigger. As an astable with R_A, R_B and C, the capacitor swings between V_CC/3 and 2V_CC/3: t_high = 0.693(R_A + R_B)C, t_low = 0.693R_BC, f = 1.44/[(R_A + 2R_B)C] and duty cycle (R_A + R_B)/(R_A + 2R_B), always above 50% in the basic circuit. For R_A = 1 kΩ, R_B = 10 kΩ, C = 10 nF: f ≈ 6.86 kHz and duty 52.4%.
5. Digital logic, flip-flops, counters, registers and data conversion
- Boolean algebra: De Morgan, (AB)′ = A′ + B′ and (A + B)′ = A′B′; absorption A + A′B = A + B; NAND and NOR are each universal. Combinational circuits (adders, multiplexers, decoders, comparators) have outputs that depend only on present inputs.
- Sequential circuits have memory. An SR latch forbids S = R = 1; a JK flip-flop toggles when J = K = 1 (a master–slave or edge-triggered design removes the race-around problem); a D flip-flop copies D at the clock edge; a T flip-flop toggles when T = 1.
- Counters and registers: n flip-flops count up to 2ⁿ states, so a mod-10 (decade) counter needs 4 and resets at 1010; a ripple counter is simple but accumulates delay, a synchronous one clocks every stage together. Shift registers move data one place per clock (SISO, SIPO, PISO, PIPO); a ring counter and a Johnson counter are shift registers fed back.
- D/A conversion: a weighted-resistor or R–2R ladder network into a summing amplifier; the resolution (one LSB) is V_ref/2ⁿ — 39.1 mV for 8 bits and 10 V. A/D conversion: a flash converter uses 2ⁿ − 1 comparators and is fastest (15 for 4 bits); successive approximation takes n clock cycles; dual-slope integration is slow but rejects mains noise.
Key takeaways
- BJT: g_m = I_C/V_T and A_v ≈ −g_mR_C; JFET: I_D = I_DSS(1 − V_GS/V_P)².
- A_f = A/(1 + Aβ) → 1/β; negative feedback trades gain for stability, bandwidth and linearity. Oscillation needs Aβ = 1 at 0° or 360°.
- RC phase shift f = 1/(2π√6 RC), gain 29; Wien bridge f = 1/(2πRC), gain 3; slew-rate limit f_max = SR/(2πV_p).
- Schmitt hysteresis 2βV_sat; 555 astable f = 1.44/[(R_A + 2R_B)C], duty (R_A + R_B)/(R_A + 2R_B).
- JK with J = K = 1 toggles; mod-N needs ⌈log₂N⌉ flip-flops; DAC LSB = V_ref/2ⁿ; flash ADC 2ⁿ − 1 comparators.
Practice questions (17)
Attempt each one before opening the answer. Every explanation names the tempting wrong option as well as the right one, because that is where marks are lost.
An inverting amplifier has R₁ = 10 kΩ and R_f = 100 kΩ, with an ideal op-amp. For an input of +0.2 V, the output voltage, in V, is ____.
Numerical answer — type the value.
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Answer: -2
V_o = −(R_f/R₁)V_i = −10 × 0.2 = −2 V. The inverting input is a virtual ground, so the input current 0.2/10 kΩ = 20 μA flows through R_f and sets V_o. Dropping the sign gives +2 V; the non-inverting formula gives +2.2 V. Type the answer as -2.A non-inverting amplifier uses R_f = 47 kΩ and R₁ = 4.7 kΩ. For an input of 0.30 V, the output voltage, in V, to one decimal place, is ____.
Numerical answer — type the value.
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Answer: 3.3
Gain = 1 + R_f/R₁ = 1 + 10 = 11, so V_o = 11 × 0.30 = 3.3 V. Using the inverting magnitude R_f/R₁ = 10 gives 3.0 V, forgetting the 1.An op-amp has a slew rate of 0.5 V/μs. The highest frequency at which it can deliver an undistorted sine wave of 10 V peak, in kHz, to two decimal places, is ____.
Numerical answer — type the value.
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Answer: 7.96
The maximum slope of V_p sin ωt is ωV_p, so 2πfV_p ≤ SR gives f_max = 0.5 × 10⁶/(2π × 10) = 7958 Hz = 7.96 kHz. Omitting 2π gives 50 kHz.An RC phase-shift oscillator uses three identical sections with R = 10 kΩ and C = 10 nF. Using f = 1/(2π√6 RC), its frequency in Hz, to the nearest integer, is ____.
Numerical answer — type the value.
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Answer: 650
RC = 10⁴ × 10⁻⁸ = 10⁻⁴ s, and f = 1/(2π × 2.449 × 10⁻⁴) = 650 Hz. At this frequency the network gives 180° and an attenuation of 1/29, so the amplifier needs a gain of at least 29. Leaving out √6 gives 1592 Hz.A Wien-bridge oscillator has R = 10 kΩ and C = 16 nF in both arms. Its frequency, in Hz, to the nearest integer, is ____.
Numerical answer — type the value.
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Answer: 995
f = 1/(2πRC) = 1/(2π × 10⁴ × 16 × 10⁻⁹) = 1/(1.005 × 10⁻³) = 995 Hz, where the network’s phase shift is zero and its gain 1/3, so the amplifier must supply 3. 1/(RC) = 6250 is the angular frequency.A BJT common-emitter stage is biased at I_C = 1.0 mA with R_C = 5.0 kΩ. Taking V_T = 25 mV and neglecting the output resistance, its small-signal voltage gain is ____.
Numerical answer — type the value.
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Answer: -200
g_m = I_C/V_T = 1 mA/25 mV = 40 mS, and A_v = −g_mR_C = −0.040 × 5000 = −200. The minus sign is the 180° inversion of the CE stage; β does not appear, because the gain is set by the bias current. Type the answer as -200.A JFET has I_DSS = 10 mA and V_P = −4 V. In saturation at V_GS = −2 V, the drain current, in mA, is ____.
Numerical answer — type the value.
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Answer: 2.5
I_D = I_DSS(1 − V_GS/V_P)² = 10 × (1 − 0.5)² = 2.5 mA. Forgetting the square gives 5 mA; the square-law is why the JFET’s transconductance falls linearly towards pinch-off.An amplifier of open-loop gain 10⁵ has negative feedback with β = 0.01. Its closed-loop gain, to one decimal place, is ____.
Numerical answer — type the value.
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Answer: 99.9
A_f = A/(1 + Aβ) = 10⁵/(1 + 1000) = 99.9, within 0.1% of 1/β = 100. A 10% change in A would change A_f by only about 0.01%. Positive feedback, A/(1 − Aβ), would be unstable here.Which are necessarily consequences of applying negative feedback to an amplifier?
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Answer: A — The gain becomes less sensitive to changes in the open-loop gain; B — The bandwidth increases; C — Non-linear distortion generated inside the loop is reduced
Desensitivity, bandwidth extension and reduced distortion each come with the factor (1 + Aβ) for any topology. The input impedance rises only for series mixing; shunt mixing (as in the inverting amplifier) lowers it, so "always increases" is false.Which statements about sinusoidal oscillators are correct?
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Answer: A — Sustained oscillation requires a loop gain of magnitude one; B — The total loop phase shift must be 0° or a multiple of 360°; C — A Wien-bridge oscillator’s amplifier needs a gain of 3
The Barkhausen conditions are |Aβ| = 1 and a total phase of 0° mod 360° — positive feedback at the oscillation frequency. The Wien network attenuates by 3 with zero phase at f = 1/(2πRC), so the amplifier supplies a gain of 3. Negative feedback at that frequency would suppress oscillation.A 555 timer in astable mode has R_A = 1.0 kΩ, R_B = 10 kΩ and C = 10 nF. Its duty cycle, in percent, to one decimal place, is ____.
Numerical answer — type the value.
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Answer: 52.4
t_high = 0.693(R_A + R_B)C and t_low = 0.693R_BC, so the duty cycle is (R_A + R_B)/(R_A + 2R_B) = 11/21 = 52.4%, at f = 1.44/(21 kΩ × 10 nF) = 6.86 kHz. R_B/(R_A + 2R_B) = 47.6% is the low fraction.An inverting Schmitt trigger saturates at ±12 V, and the positive-feedback divider returns a fraction β = 1/3 of the output to the non-inverting input. The width of its hysteresis band, in V, is ____.
Numerical answer — type the value.
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Answer: 8
The thresholds are ±βV_sat = ±4 V, so the band from −4 V to +4 V is 2βV_sat = 8 V wide. Quoting one threshold (4 V) gives half the width, and ignoring β gives 24 V.A JK flip-flop with J = K = 1 is clocked. Its output:
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Answer: A — Toggles on each active clock edge
J = K = 1 is the toggle condition, Q⁺ = Q′, which is how a JK wired this way divides the clock by two. J = K = 0 holds the state; the indeterminate case belongs to the SR latch with S = R = 1, which the JK design removes.The Boolean expression A + A′B simplifies to:
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Answer: A — A + B
A + A′B = (A + A′)(A + B) = 1 · (A + B) = A + B, by distribution over OR. The absorption A + AB = A is the look-alike that gives the wrong answer A.A 4-bit flash analogue-to-digital converter needs how many comparators?
Numerical answer — type the value.
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Answer: 15
A flash converter compares the input against every one of the 2ⁿ − 1 = 15 thresholds at once, which is why it is fastest and why its size doubles with each bit. A successive-approximation converter needs one comparator and n clock cycles.An 8-bit D/A converter has a 10 V reference. Its resolution (the output step for one LSB), in mV, to one decimal place, is ____.
Numerical answer — type the value.
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Answer: 39.1
One LSB = V_ref/2ⁿ = 10/256 = 0.0391 V = 39.1 mV. Dividing by 2ⁿ − 1 = 255 gives 39.2 mV, the step when full scale is defined as the all-ones output; the question’s convention is V_ref/2ⁿ.The minimum number of flip-flops needed for a mod-10 counter is:
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Answer: A — 4
n flip-flops give 2ⁿ states; 2³ = 8 < 10 ≤ 16 = 2⁴, so four are needed, with the count reset at 1010. Ten flip-flops would be a ring counter, which uses one per state.